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Espressif Developer Portal

“Welcome to the Espressif Systems Developer Portal—your official hub for all good things, such as the ESP32 and more. Explore our extensive collection of articles, workshops, and tutorials to enhance your development journey with the latest tools and insights.”

Upcoming Events
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Espressif DevCon26 - 5th Anniversary Live from Milan

Espressif DevCon 2026 marks its 5th anniversary with its first-ever live event in Milan, Italy, on November 3–4, 2026. The two-day event will feature a global conference livestream covering product launches, AI, connectivity, security, developer tools, and technical sessions, followed by hands-on technical workshops in Milan and China Ecosystem Day in Shanghai. Tickets will be released soon, with limited seats available.

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Featured Articles#

Introducing the esp_trace component

esp_trace is a new ESP-IDF component that splits application-level tracing into pluggable encoders and transports, so adding a new trace library no longer means patching the kernel. This post gives a high-level tour and walks through the example that demonstrates the integration.

Developing a Zephyr IoT app with AI

·15 mins
Still on improving our AI-based, embedded software workflow, this article applies the same AI-agent discipline to Zephyr. Using the same ESP Dualkey kit from M5Stack, specs, integration rules, plan→execute→commit→test, reusable modules, journals, and Git - without redefining the product.


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Workshop Highlights
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Dive into our latest workshops and master the skills you need to maximize the power of the ESP32.


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Recent

Announcing Espressif's Aliro SDK

·3 mins
Aliro brings mobile access credentials to Espressif devices and is compatible with Matter. We are excited to announce esp-aliro, an SDK that enables support for the Aliro standardized protocol on Espressif SoCs.

AES67 audio-over-IP on the ESP32-P4

AES67/RAVENNA is the audio transport behind a lot of broadcast and live-sound infrastructure, and it normally runs on dedicated silicon or Linux boxes. This article is about getting a working, PTP-synchronized AES67 endpoint onto an ESP32-P4 — how the clock sync, the low-latency receive path, and the I2S playout fit together, what the measured latency is, and where the edges are.